An Implementation of Multiplier-Accumulator Unit Using Vedic Multiplier and Reversible Gates

Abstract

The Multiplier-Accumulator Unit (MAC) is a fundamental component in digital signal processing (DSP) and various high-performance computing applications. This paper presents an efficient implementation of a MAC unit using a Vedic multiplier and reversible logic gates to optimize speed, power, and area. The Vedic multiplier, based on ancient Indian mathematics, significantly enhances multiplication efficiency by reducing the number of partial products and carry propagation delays. Additionally, reversible logic gates are employed to minimize power dissipation by reducing information loss, making the design more energy-efficient compared to conventional approaches. The proposed MAC unit architecture is simulated and synthesized using hardware description languages, demonstrating superior performance in terms of speed and power consumption. The results indicate that integrating Vedic multiplication with reversible logic offers a promising solution for low-power, high-speed arithmetic units in modern computing systems.

Introduction

The paper discusses the design and implementation of an efficient Multiply-Accumulator (MAC) unit using Vedic multiplication techniques and reversible logic gates. This approach aims to enhance performance in digital signal processing (DSP), artificial intelligence (AI), and cryptographic applications by improving speed and reducing power consumption.

Key Highlights:

• Vedic Multiplier: Utilizes the Urdhva Tiryakbhyam sutra from ancient Indian mathematics for fast multiplication. This method reduces the number of partial products and intermediate calculations, leading to lower delay and improved computational efficiency compared to traditional methods like Booth or array multipliers.ijraset.com+1rsisinternational.org+1

• Reversible Logic Gates: Incorporates gates such as Fredkin, Toffoli, and Peres to minimize power dissipation. Reversible logic ensures minimal information loss, adhering to Landauer’s principle, which states that erasing information in a computational process results in energy dissipation.

• Design Implementation: The MAC unit is designed using Verilog HDL and synthesized using Xilinx tools. Simulation results demonstrate that the Vedic multiplier offers faster multiplication, and the use of reversible gates reduces overall power dissipation, achieving lower delay and improved energy efficiency compared to traditional designs.ijesar.in+3ijser.org+3studylib.net+3

• Comparative Analysis: When compared to conventional MAC units, Booth Multiplier-Based MACs, and Wallace Tree MACs, the proposed design shows advantages in performance and efficiency, making it suitable for next-generation computing and embedded system applications.

Conclusion

The results are obtained from the proposed DKG adder gate design using a Vedic multiplier with reversible computing are relatively good. The proposed 64- bit MAC unit is successfully designed with Vedic multiplier using RCA and CSLA using DKG reversible logic. it has been proved that the design is optimized in terms of total delay. We are successfully designed all the 64-bit MAC architecture of fundamental analyzed for all the existing blocks. Hence, we can prove that the Urdhava Triyagbhayam sutra with 64-bit MAC Unit and the reversible logic concept is the finest in terms of total delay aspect. The overall Simulation and synthesis process is successfully carried out with Xilinx ISE. The design parameters of any architecture completely depend on the basic building blocks. For our proposed design MAC, the basic building blocks are a multiplier and the adder. In future, these basic building block designs are designed highly optimized than our proposed design obviously, it leads to reduce the total delay in the MAC architecture.

References

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Copyright

Copyright © 2025 R. Shashikala, Tanda Vasu Goud, Tanneru Shiva, Varugu Darmitha Sree Vidya. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.